Design a Multiplexer

CSC-116 · Semester I · Digital Logic

Live simulation20 components · 25 wires
D0
OFF
D1
OFF
D2
OFF
D3
OFF
S1
OFF
S0
OFF
NOT
1
NOT
1
S1'·S0'
1
S1'·S0
0
S1·S0'
0
S1·S0
0
D0·t00
0
D1·t01
0
D2·t10
0
D3·t11
0
OR
0
OR
0
OR
0
F0

Click a switch to toggle it · drag output → input to wire · drag to move · Delete removes the selection · Ctrl+Z undoes.

Truth table

live from the current circuit
D0D1D2D3S1S0F
0000000
0000010
0000100
0000110
0001000
0001010
0001100
0001111
0010000
0010010
0010101
0010110
0011000
0011010
0011101
0011111
0100000
0100011
0100100
0100110
0101000
0101011
0101100
0101111
0110000
0110011
0110101
0110110
0111000
0111011
0111101
0111111
1000001
1000010
1000100
1000110
1001001
1001010
1001100
1001111
1010001
1010010
1010101
1010110
1011001
1011010
1011101
1011111
1100001
1100011
1100100
1100110
1101001
1101011
1101100
1101111
1110001
1110011
1110101
1110110
1111001
1111011
1111101
1111111