Memory Hierarchy Explorer

CSC-213 · Semester III · Computer Architecture

Memory Hierarchy Explorer

Speed up top, capacity and cost at the bottom.

Selected: L2 Cache

256-512 KB capacity

Latency ≈ 10-20 cycles

Cost ≈ $5/MB

Temporal and spatial locality make the hierarchy work: the CPU keeps hot data in fast small storage and misses go one level down. Each miss costs 10-100x more than a hit.